Job Description

Get AI-powered advice on this job and more exclusive features.

This range is provided by LanceSoft, Inc.. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$75.00/hr - $95.00/hr

Direct message the job poster from LanceSoft, Inc.

Lead-US Staffing(Semiconductor)::Hiring - Physical design Engineers II Design Verification Engineers II DFT Engineers II Embedded/Firmware EngineerII…

Pay rate range:$75/hr to $95/hr

Job Description:

□ Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff

□ Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks

□ Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts)

□ Constantly review/identify the places to improve the process and ways to identify the issues early in the design phase.

□ Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency.

□ Attention to the detail. Very good communication skills (both written and verbal)

□ Fast learner and self-starter. Need to execute our custom regression scripts/quality checks for our complex designs (Multimode, multimillion gates and multiple partitions)

□ Understand the PT/DC checks and review the reports to help clean up in order to meet each milestone targets.

□ Summarize the regression results periodically to track the progress.

PREFERRED EXPERIENCE:

• Minimum of 6-8 years' experience

• Worked with EDA tools that enable RTL quality checks

• Experience with analyzing the timing reports and identifying both the design and constraints related issues.

• Ability to multitask, ramp up quickly on new flows/tools/ideas.

• Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc. - other EDA tool experience acceptable

EDUCATION:

• Bachelor's degree required

Employee Benefits:

At LanceSoft, full time regular employees who work a minimum of 30 hours a week or more are entitled to the following benefits:

• Four options of medical Insurance

• Dental and Vision Insurance

• Critical Illness Insurance

• Voluntary Permanent Life Insurance

• Other Employee Perks

About LanceSoft

LanceSoft is rated as one of the largest staffing firms in the US by SIA. Our mission is to establish global cross-culture human connections that further the careers of our employees and strengthen the businesses of our clients. We are driven to use the power of our global network to connect businesses with the right people, and people with the right businesses without bias. We provide Global Workforce Solutions with a human touch.

EEO Employer

LanceSoft is a certified Minority Business Enterprise (MBE) and an equal opportunity employer. We prohibit discrimination and harassment of any kind based on race, color, sex, religion, sexual orientation, national origin, disability, genetic information, pregnancy, or any other protected characteristic as outlined by federal, state, or local laws.

This policy applies to all employment practices within our organization, including hiring, recruiting, promotion, termination, layoff, recall, leave of absence, compensation, benefits, training, and apprenticeship. LanceSoft makes hiring decisions based solely on qualifications, merit, and business needs at the time.

Want to read more about LanceSoft?

Click here to visit our website -

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Contract

Job function

• Industries

  Semiconductor Manufacturing and Manufacturing

Referrals increase your chances of interviewing at LanceSoft, Inc. by 2x

Sign in to set job alerts for “Physical Design Engineer” roles.

Physical Design and Verification Engineer

Milpitas, CA $170,000.00-$210,000.00 1 week ago

SoC Physical Design Engineer, Implementation

San Jose, CA $150,000.00-$275,000.00 6 days ago

Santa Clara, CA $118,000.00-$216,000.00 1 day ago

Sunnyvale, CA $173,000.00-$249,000.00 2 weeks ago

Physical Design Engineer, Custom Datapath

Cupertino, CA $104,000.00-$212,200.00 4 hours ago

ASIC/SOC Silicon Physical Design Engineer

Mountain View, CA $120,000.00-$400,000.00 7 months ago

Santa Clara, CA $118,000.00-$216,000.00 5 hours ago

Physical Design Engineer (Place & Route)

CPU Physical Design – Low Power Signoff Engineer

Physical Design Engineer, Static Timing Analysis, Google Cloud

SOC/ASIC Physical Design Engineer (Silicon Engineering)

Sunnyvale, CA $130,000.00-$155,000.00 15 hours ago

ASIC Physical Design Engineer, Annapurna Labs

San Jose, CA $165,700.00-$232,900.00 1 week ago

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

Job Tags

Similar Jobs